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Sample and Hold Circuit

IP.com Disclosure Number: IPCOM000061582D
Original Publication Date: 1986-Aug-01
Included in the Prior Art Database: 2005-Mar-09
Document File: 2 page(s) / 40K

Publishing Venue

IBM

Related People

Trnka, JT: AUTHOR [+2]

Abstract

A new bipolar sample-and-hold circuit featuring a low droop rate and fast acquisition time. The sample-and-hold (S/H) circuit is shown above. An external sample-and-hold capacitor is connected to node 30. By connecting a unity gain amplifier OP1 to node 30, a sample-and-hold amplifier is formed. Q19-Q22, Q28, Q30-Q34 comprise a TTL receiver that places the S/H in either the sample or hold mode.

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Sample and Hold Circuit

A new bipolar sample-and-hold circuit featuring a low droop rate and fast acquisition time. The sample-and-hold (S/H) circuit is shown above. An external sample-and-hold capacitor is connected to node 30. By connecting a unity gain amplifier OP1 to node 30, a sample-and-hold amplifier is formed. Q19-Q22, Q28, Q30-Q34 comprise a TTL receiver that places the S/H in either the sample or hold mode.

Q1-Q3 and Q23-Q26 comprise a first gain stage. Q8,Q14,Q15, and D1 comprise a second gain stage. Q10, Q18, and Q27 are the driving transistors. NREF and PREF are voltage reference lines that bias the current source transistors. Node D0 is the data input to the S/H circuit. Node S0 is the logic input that places the S/H circuit in either the sample or hold mode. The main features of the circuit are: (1) the use of diodes D10-D13 with resistor R28 to improve the stability of the S/H circuit and yet maintain a fast acquisition rate, (2) the use of gating transistor Q29 to minimize the droop rate during the hold mode by cutting transistor Q1 off (preventing the Q1 base current from discharging the S/H capacitor). In the sample mode, TTL input S0 is high, turning on Q21 and cutting off Q22 and Q20. With no base current, Q29 and Q17 are cut off, activating the S/H circuit gain stages. As an example, with data input D0 slewing low to high, Q2 will initially source more current than Q1. Thus nodes 66 and 81 will fall, and nodes 65 and 68 will rise. Q15 will...