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Method of Mapping a Large Number of Address Spaces With Memory Resident Tables for the Computer Systems With Extended Memory Addressing

IP.com Disclosure Number: IPCOM000061638D
Original Publication Date: 1986-Sep-01
Included in the Prior Art Database: 2005-Mar-09
Document File: 2 page(s) / 25K

Publishing Venue

IBM

Related People

Kurtz, HL: AUTHOR [+3]

Abstract

A technique is described whereby a method is provided to map large numbers of address spaces, as used in computer architecture with extended addressing capability, through the use of resident memory tables called Segment Tables (STs). Each address space that the program has made active is provided with a program-managed logical to real translation table, which is resident in the system's real address space. The ability to extend the addressing capability of computers, such as the IBM Series/1, from a typical 16 bits per address space (64K bytes of address space) to a larger address space base, the normal method of mapping address space allocation, is in the use of Segment Tables. However, this method is cost prohibitive because of the large number of segment registers required.

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Method of Mapping a Large Number of Address Spaces With Memory Resident Tables for the Computer Systems With Extended Memory Addressing

A technique is described whereby a method is provided to map large numbers of address spaces, as used in computer architecture with extended addressing capability, through the use of resident memory tables called Segment Tables (STs). Each address space that the program has made active is provided with a program-managed logical to real translation table, which is resident in the system's real address space. The ability to extend the addressing capability of computers, such as the IBM Series/1, from a typical 16 bits per address space (64K bytes of address space) to a larger address space base, the normal method of mapping address space allocation, is in the use of Segment Tables. However, this method is cost prohibitive because of the large number of segment registers required. To resolve this problem, for each active space, a ST is generated by the system and placed in memory. For each 2K-byte page allocated to an address space, an entry is created in an associated ST. The entry contains the physical page address which correlates to the logical page address used by the program. To illustrate how memory mapping is accomplished through the use of segment tables, the following bit allocation defines the control translation action:

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Bits 0-12 Defines the segment address of one of 8K segments within a 16-megabyte space...