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Electrostatic Discharge Immune Storage Plate Structure for One-Device Cells

IP.com Disclosure Number: IPCOM000061656D
Original Publication Date: 1986-Sep-01
Included in the Prior Art Database: 2005-Mar-09
Document File: 2 page(s) / 53K

Publishing Venue

IBM

Related People

Poplawski, E: AUTHOR [+2]

Abstract

This article shows a non-critical process step which is added early in the fabrication of advanced one-device memory cell structures to provide a voltage-limiting diode. The diode protects the thin insulators from breaking down during subsequent process steps due to electrostatic discharge (ESD). Throughout the fabrication processes for integrated circuits, negative charges are generated at various steps, e.g., in plasma or reactive ion etch reactors, in spin drying machines, in ion implantation systems and in the handling and transportation of the product. Electrostatic charges accumulate on the conductors in the product to create an electric field which may cause insulator breakdown of the underlying storage node oxides.

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Electrostatic Discharge Immune Storage Plate Structure for One-Device Cells

This article shows a non-critical process step which is added early in the fabrication of advanced one-device memory cell structures to provide a voltage- limiting diode. The diode protects the thin insulators from breaking down during subsequent process steps due to electrostatic discharge (ESD). Throughout the fabrication processes for integrated circuits, negative charges are generated at various steps, e.g., in plasma or reactive ion etch reactors, in spin drying machines, in ion implantation systems and in the handling and transportation of the product. Electrostatic charges accumulate on the conductors in the product to create an electric field which may cause insulator breakdown of the underlying storage node oxides. This problem becomes more evident as advanced cell structures migrate towards thinner oxides in the storage nodes. A solution to the problem is to provide a path to ground (diode) for the vulnerable one-device (1-D) storage nodes and to allow the electrostatic charges to leak off before a potentially destructive ESD takes place. Fig. 1 shows a 1-D cell having a polysilicon storage plate 10, thin oxide nodes 11, a polysilicon tab 12 appended to storage plate 10, bit line diffusion opening 13 and a substrate contact opening 14 in the tab area 12. Fig. 2 shows a cross-section of the conduction path defined by the N+ doped polysilicon (storage plate 10) and substrate 15 wh...