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Prefetch Confirmation/Access Array

IP.com Disclosure Number: IPCOM000061684D
Original Publication Date: 1986-Aug-01
Included in the Prior Art Database: 2005-Mar-09
Document File: 1 page(s) / 12K

Publishing Venue

IBM

Related People

Emma, PG: AUTHOR [+5]

Abstract

In sequential prefetching schemes which prefetch directly into a cache, care must be taken to distinguish between lines which are prefetched and never accessed and those which are prefetched and accessed or demand fetched. A class of prior confirmation techniques turn off a confirmation bit in a confirmation array when a corresponding line is prefetched and set the confirmation bit on exit from the cache so as to prompt prefetching of that line under suitable conditions subsequently. For simplicity, it is assumed herein that the confirmation bit for line X controls the prefetching of line X. The confirmation array can now have a dual purpose: 1. Prompts prefetching for lines not in the cache 2.

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Prefetch Confirmation/Access Array

In sequential prefetching schemes which prefetch directly into a cache, care must be taken to distinguish between lines which are prefetched and never accessed and those which are prefetched and accessed or demand fetched. A class of prior confirmation techniques turn off a confirmation bit in a confirmation array when a corresponding line is prefetched and set the confirmation bit on exit from the cache so as to prompt prefetching of that line under suitable conditions subsequently. For simplicity, it is assumed herein that the confirmation bit for line X controls the prefetching of line X. The confirmation array can now have a dual purpose: 1. Prompts prefetching for lines not in the cache 2. Certifies access for lines in the cache The access certification is performed as follows: On each MRU (Most Recently Used) change created by a processor access, the line address sets the corresponding bit in the confirmation array. Since the only lines that are prefetchable are not in the cache and any lines that are accessed must be in the cache (a cache miss sets the bit in the confirmation array), no confusion can arise as to the meaning of the bit in the confirmation array. Hence, the confirmation array now becomes a combined confirmation/access array instead of just a confirmation array or just an access array. On exit, appropriate confirmation criteria is "ANDed" with the confirmation bit to get the new value thereof so that only ac...