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Raster CRT Controller to Drive a Plasma Panel

IP.com Disclosure Number: IPCOM000061716D
Original Publication Date: 1986-Sep-01
Included in the Prior Art Database: 2005-Mar-09
Document File: 2 page(s) / 40K

Publishing Venue

IBM

Related People

Carissimo, DJ: AUTHOR [+3]

Abstract

High resolution plasma panels make attractive devices for graphic displays, but the complicated interface requirements of the panel require either a microprocessor or a large amount of hardware for drawing graphics. While using a microprocessor is relatively inexpensive, it is very slow for drawing graphics. Random logic is faster drawing and otherwise excellent, but is expensive and requires extensive card area. A raster graphics CRT controller (CRTC) can be used to drive the plasma panel, is affordable and produces excellent performance results. The CRTC works as follows. As seen in the block diagram, a raster graphics CRTC 1 is used to drive a plasma panel 2. The CRTC 1 has a 128K-byte frame buffer 3 that it draws the raster graphics image in.

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Raster CRT Controller to Drive a Plasma Panel

High resolution plasma panels make attractive devices for graphic displays, but the complicated interface requirements of the panel require either a microprocessor or a large amount of hardware for drawing graphics. While using a microprocessor is relatively inexpensive, it is very slow for drawing graphics. Random logic is faster drawing and otherwise excellent, but is expensive and requires extensive card area. A raster graphics CRT controller (CRTC) can be used to drive the plasma panel, is affordable and produces excellent performance results. The CRTC works as follows. As seen in the block diagram, a raster graphics CRTC 1 is used to drive a plasma panel 2. The CRTC 1 has a 128K-byte frame buffer 3 that it draws the raster graphics image in. The CRTC 1 draws at the rate of 800 nsec/pixel using high level graphics commands. The two 32-bit shift registers 4 are used to form the 64- and 10-bit serial words required to send data to the panel 2. High speed data transfers from frame buffer 3 to panel 2 are accomplished by using a direct memory access controller 5. The CRTC 1 does all the address calculations for moving full or partial portions of the screen image from frame buffer 3 to panel 2. DMA controller 5 supplies addresses for the shift registers 4 and panel 2, as well as interface and handshake signals. The 8051 8-bit microcontroller 6 is used to calculate the initial counts and addresses for the transfers and...