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Fast Vertical Flyback Circuit

IP.com Disclosure Number: IPCOM000061789D
Original Publication Date: 1986-Sep-01
Included in the Prior Art Database: 2005-Mar-09
Document File: 2 page(s) / 39K

Publishing Venue

IBM

Related People

Morrish, AJ: AUTHOR

Abstract

A fast vertical flyback circuit for a CRT display gives flyback times of 200 microseconds, allowing a blanking time of 300 microseconds to be used without character distortion. The circuit requires positive and negative supply rails together with a high voltage rail. Fast flyback is achieved by a special flyback bootstrap circuit associated with a vertical deflection amplifier. Modern displays are becoming more demanding in performance and component cost. One aspect of the performance of a display is in the scan generating circuits; minimum retrace (flyback) times are required for a maximum duty cycle, and, hence, brightness, yet circuit complexity and component count must be minimal for cost effectiveness.

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Fast Vertical Flyback Circuit

A fast vertical flyback circuit for a CRT display gives flyback times of 200 microseconds, allowing a blanking time of 300 microseconds to be used without character distortion. The circuit requires positive and negative supply rails together with a high voltage rail. Fast flyback is achieved by a special flyback bootstrap circuit associated with a vertical deflection amplifier. Modern displays are becoming more demanding in performance and component cost. One aspect of the performance of a display is in the scan generating circuits; minimum retrace (flyback) times are required for a maximum duty cycle, and, hence, brightness, yet circuit complexity and component count must be minimal for cost effectiveness. For minimum cost and best performance the vertical deflection amplifier shown in the circuit diagram was designed using split supply rails of +12V and -12V together with a high voltage supply of +70V. Transistor Q1 acts as level shifting stage and supplies current into the summing node at the base of transistor Q2; the feedback network around Q2 stabilizes the gain. When current is being drawn out of the yoke, Q2 sinks this current through diode D1. When current is being driven into the vertical yoke, transistor Q3 supplies this current, being controlled by Q2 (the Q2/Q3 output stage arrangement is common in TV deflection circuits) and drawing bias current by bootstrapping via C2 and R5 and R6. During the forward scan portion of the waveform the current is drawn fr...