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Minimizing Paging Interference in Sorting Operations

IP.com Disclosure Number: IPCOM000061964D
Original Publication Date: 1986-Aug-01
Included in the Prior Art Database: 2005-Mar-09
Document File: 1 page(s) / 11K

Publishing Venue

IBM

Related People

Anglin, MD: AUTHOR [+4]

Abstract

This invention relates to a method for reducing paging interference in a multistage sorting operation. The method s comprise (a) determining the system's capacity for paging; and at each stage of the sorting operation, (b) determining the current paging rate, and (c) using the capacity for paging and the current paging rate to allocate an optimum size of storage to the sorting operation.

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Minimizing Paging Interference in Sorting Operations

This invention relates to a method for reducing paging interference in a multistage sorting operation. The method s comprise (a) determining the system's capacity for paging; and at each stage of the sorting operation, (b) determining the current paging rate, and (c) using the capacity for paging and the current paging rate to allocate an optimum size of storage to the sorting operation.

A system's capacity for paging is represented by the maximum size M of memory allocated to a task when the paging rate in the system falls below a paging limit r, and the paging rate threshold R above which a task is allocated a minimum size m of memory.

To reduce paging interference in a multistage sorting operation, an optimum size memory is allocated to the sort task at each stage of the sorting operation. Given a current paging rate of P of the system, the memory size V allocated to the sort task at a stage is determined by one of the following equations: 1.If P <= r, then V = M; 2.If r < P < R, then V = M-((M-m)/(R-r)) * (P-r); or 3.If R <= P, then v = r.

The memory size V calculated from the above equations can be increased (e.g. by 20 percent) if memory accesses during a stage of the sorting operation are less random.

Disclosed anonymously.

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