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Browse Prior Art Database

ALU Implementing Native Minimum/Maximum Function for Signal Processing Applications

IP.com Disclosure Number: IPCOM000062061D
Original Publication Date: 1986-Oct-01
Included in the Prior Art Database: 2005-Mar-09
Document File: 3 page(s) / 76K

Publishing Venue

IBM

Related People

Jones, GD: AUTHOR

Abstract

This disclosure provides a means of implementing minimum and maximum algebraic and/or absolute magnitude finding functions in digital signal processors. This permits these functions to be executed in a single processor cycle which greatly reduces the amount of processing encountered in the numerous test and branch sequences normally used to execute minimum and maximum finding operations for signal processing applications. Particular improvement in the area of pipeline delay effects for pipelined signal processors is also achieved. In digital signal processing, many algorithms utilized require the finding of a signal level from among a number of samples.

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ALU Implementing Native Minimum/Maximum Function for Signal Processing Applications

This disclosure provides a means of implementing minimum and maximum algebraic and/or absolute magnitude finding functions in digital signal processors. This permits these functions to be executed in a single processor cycle which greatly reduces the amount of processing encountered in the numerous test and branch sequences normally used to execute minimum and maximum finding operations for signal processing applications. Particular improvement in the area of pipeline delay effects for pipelined signal processors is also achieved. In digital signal processing, many algorithms utilized require the finding of a signal level from among a number of samples.

This generally involves finding the largest or the least magnitude in a block of signal samples. Often, the largest magnitude is to be determined regardless of size, i.e., in the absolute sense. Many operations of this type are used in block floating-point calculations, signal level quantizers, and in numerous peak-finding algorithms utilized for gain and frequency determination and control.

The usual approach in both signal processors and general-purpose processors is to find maximum or minimum magnitudes by determining the magnitude of a series of test and branch operations. The test and branch operations require between four and eight functional operations in programming steps and machine execution cycles to find the result. For a block of 128 samples where a peak is to be found from among the 128 samples, this means that between 512 and 1024 processor operations will be required to determine the sample having the largest magnitude. The problem is further exacerbated when a pipelined processor structure is utilized to achieve greater throughput. Pipelining increases the overall performance of the processor, but may reduce the efficiency in which test and branch operations may be executed. This arises primarily because instructions after a branch instruction may have already reached the stage of being decoded when the information on which the earlier branch instruction decision is to be made is acted on. This means that the following instruction must be executed regardless of whether the branch is taken or not. In some cases the instruction following a branch instruction may be non-flow dependent and will not be influenced by the branching decision. More generally, however, instructions following the branch instruction are selected to be no-op (no operation) to avoid the possibility of interference between execution of the branch and execution of the following instruction. The use of the no-op instructions to avoid these pipelined effects further increases the processing load as a number of machine cycles required to perform test and branch sequences which are commonly used in determining peak or minimum magnitudes from among a block of samples. The pipelining effect increases the typical minimum...