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Handling Defective Tracks in a Cached Environment

IP.com Disclosure Number: IPCOM000062108D
Original Publication Date: 1986-Oct-01
Included in the Prior Art Database: 2005-Mar-09
Document File: 2 page(s) / 32K

Publishing Venue

IBM

Related People

Berger, BH: AUTHOR [+3]

Abstract

Large random-access caches operatively associated with direct-access storage devices (DASDs) can improve response times by storing the home address (HA) and record zero (R0) in the cache and use pointers to a DASD alternate track which has its data image stored in cache. A connected host processor in accessing a defective track gets the information it needs based upon the cache-stored HA and R0 with immediate access to the alternate track without causing a separated DASD SEEK. Replacement control of the defective and alternate tracks with respect to their storage in the cache can follow several replacement protocols. A host processor is connected to a DASD and a cache. The cache is managed for storing data from the DASD in the cache which is most likely to be used by the connected host processors.

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Handling Defective Tracks in a Cached Environment

Large random-access caches operatively associated with direct-access storage devices (DASDs) can improve response times by storing the home address (HA) and record zero (R0) in the cache and use pointers to a DASD alternate track which has its data image stored in cache. A connected host processor in accessing a defective track gets the information it needs based upon the cache- stored HA and R0 with immediate access to the alternate track without causing a separated DASD SEEK. Replacement control of the defective and alternate tracks with respect to their storage in the cache can follow several replacement protocols. A host processor is connected to a DASD and a cache. The cache is managed for storing data from the DASD in the cache which is most likely to be used by the connected host processors. The cache includes a directory which points to the location in cache the DASD data is stored. The host processor accesses the data stored in either the cache or the DASD by using the DASD address space. When an access track T is defective, it still stores HA and R0 plus a pointer to the alternate track A. To read the data, the DASD causes a HEAD SEEK from track T to alternate track A, whereupon the host processor accesses the data. In cache environment, the same protocol is followed except that the HA and R0, together with the alternate track pointer, i stored in a portion of the cache. Just enough cache data storage space is provided for storing the HA, R0, and pointers. Usual addressing techniques can be employed for accessing such limited storage and yet use the directory. Additionally, in the dat...