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Optoelectronic Data Packet Routing Circuit

IP.com Disclosure Number: IPCOM000062167D
Original Publication Date: 1986-Oct-01
Included in the Prior Art Database: 2005-Mar-09
Document File: 2 page(s) / 14K

Publishing Venue

IBM

Related People

Anacker, W: AUTHOR

Abstract

Many communications systems require routing of data packets (binary strings of 100 bits or more) from any of many sources to any of many receivers. Typically, each packet comprises its destination address in its "header" string. Examples where such routing is needed include dataflow machines, LANs, WANs, telecommunication, etc. It is here proposed to use an integrated optoelectronics "routing" chip to accomplish the data routing. A typical embodiment of the invention is given as follows: A number, N2 (say, N=8), of solid-state lasers with driver circuits and N2 p-n photodetectors with amplifiers and signal detectors are integrated on a chip (e.g., GaAs, Ga-In-As-P). The lasers can be of the type described in an article in Electronics Week of June 3, 1985, pages 30-34.

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Optoelectronic Data Packet Routing Circuit

Many communications systems require routing of data packets (binary strings of 100 bits or more) from any of many sources to any of many receivers. Typically, each packet comprises its destination address in its "header" string. Examples where such routing is needed include dataflow machines, LANs, WANs, telecommunication, etc. It is here proposed to use an integrated optoelectronics "routing" chip to accomplish the data routing. A typical embodiment of the invention is given as follows: A number, N2 (say, N=8), of solid-state lasers with driver circuits and N2 p-n photodetectors with amplifiers and signal detectors are integrated on a chip (e.g., GaAs, Ga-In-As-P). The lasers can be of the type described in an article in Electronics Week of June 3, 1985, pages 30-34. There light output emanates from the chip surface in a direction perpendicular to it. Each laser driver is connected via a high speed shift register, which is sufficiently long to hold the bits of a whole data packet, to the output of a (micro) processor. Similarly, each signal level detector output is connected via a shift register to the input of a processor. As will be explained later, the proposed operation mode permits use of a single I/O line and possibly a single shift register per processor. The input shift registers are equipped with address matching circuits. It is preferred to arrange at least the address matching circuits, if not all shift registers, on the routing chip. In the simplest embodiment, a mirror or mirror housing of the size of the routing chip is arranged on top of it to reflect the light output of each laser back on all photodetectors on the routing chip. However, this scheme may pose S/N (signal-to-noise) problems at very high data rates. In an improved embodiment, one may replace the mirror with a "reflector" chip, which comprises N2 photodetectors (or a fraction thereof) and one (or more) solid-state laser circuits. Photodetectors and lasers are electrically connected so that the laser(s) will fire whenever any of the photodetectors receives signals. It is advantageous to concentrate the N2 photodetectors of the routing chip in its center and to distribute the N2 lasers around them. Similarly, it is advantageous to concentrate the laser(s) of the reflector chip in its center and to arrange the photodetectors, say, N2/4 of them, such that they are opposite to groups of 4...