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Intermetallic Semiconductor Buffered Substrate

IP.com Disclosure Number: IPCOM000062264D
Original Publication Date: 1986-Oct-01
Included in the Prior Art Database: 2005-Mar-09
Document File: 1 page(s) / 11K

Publishing Venue

IBM

Related People

Hovel, HJ: AUTHOR

Abstract

The buffered substrate structure is shown in the figure. It consists of a low dislocation substrate such as an In-doped substrate, a superlattice structure consisting of 5 or more layer combinations of GaAlAs, with 50% or more Al, and GaAs layers of 100-500 Angstroms each, and a GaAs final layer doped with a deep acceptor, such as Cr, Fe, V, or Ni, with a concentration of 5 x 1014 & Na & 5 x 1015, and a thickness of 1 to 5 microns. The deep acceptor acts as both a compensator to provide semi-insulating properties and a trap to raise the trap-filled limit voltage and prevent space-charge-limited currents which contribute to back and side-gating. Both molecular beam epitaxy metal organic chemical vapor deposition can be used to obtain the epitaxial layers.

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Intermetallic Semiconductor Buffered Substrate

The buffered substrate structure is shown in the figure. It consists of a low dislocation substrate such as an In-doped substrate, a superlattice structure consisting of 5 or more layer combinations of GaAlAs, with 50% or more Al, and GaAs layers of 100-500 Angstroms each, and a GaAs final layer doped with a deep acceptor, such as Cr, Fe, V, or Ni, with a concentration of 5 x 1014 & Na & 5 x 1015, and a thickness of 1 to 5 microns. The deep acceptor acts as both a compensator to provide semi-insulating properties and a trap to raise the trap- filled limit voltage and prevent space-charge-limited currents which contribute to back and side-gating. Both molecular beam epitaxy metal organic chemical vapor deposition can be used to obtain the epitaxial layers.

The structure can be used as a source material for ion implanted GaAs integrated circuits using any low defect substrate starting material. It can further provide low defect layers of ternary or quarternary III-V layers by replacing the upper GaAs epitaxial layer with an appropriate material. A deep acceptor can also be used for such layers if semi-insulating behavior is desired. Shallow doping, or none at all, may be desired for specific device structures.

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