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Stress Verification of a Program Disk

IP.com Disclosure Number: IPCOM000062279D
Original Publication Date: 1986-Nov-01
Included in the Prior Art Database: 2005-Mar-09
Document File: 2 page(s) / 33K

Publishing Venue

IBM

Related People

Buhler, OR: AUTHOR [+2]

Abstract

After a 5»-inch diskette is written with a program's data image, the disk's program is read back under stress conditions. If the disk passes this stress test, user compatibility is ensured. After a program is written on a disk, the disk is read back under a stressed read condition. A stress read condition, as the name implies, places the diskette drive's read circuits into a more vigorous testing environment. This stress read condition increases the susceptibility to bit shift errors. This verification process not only performs a cyclic redundancy check (CRC) of the previously written data, but also performs the verification of data using a stress read condition. Generally, stress read is accomplished by a modification to the VFO or data recovery circuitry.

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Stress Verification of a Program Disk

After a 5»-inch diskette is written with a program's data image, the disk's program is read back under stress conditions. If the disk passes this stress test, user compatibility is ensured. After a program is written on a disk, the disk is read back under a stressed read condition. A stress read condition, as the name implies, places the diskette drive's read circuits into a more vigorous testing environment. This stress read condition increases the susceptibility to bit shift errors. This verification process not only performs a cyclic redundancy check (CRC) of the previously written data, but also performs the verification of data using a stress read condition. Generally, stress read is accomplished by a modification to the VFO or data recovery circuitry. This circuitry is used to synchronize the diskette drive's adapter to raw data which is generated by reading the disk. The data recovery circuitry employed generates a pulse labeled "Data Window" in Fig. 1. During the presence of the "Data Window", a transition from inactive to active, and back to inactive, signifies a logical "1" to the disk drive's controller. This occurrence can happen at any time during the assertion of "Data Window", and the logical "1" will be detected properly. Any shift in the center of the raw data pulse relative to the center of the "Data Window" is known as bit shift. In Fig. 1, the raw data pulse is "early" in the data window. By observing the...