Browse Prior Art Database

Interrupt Sharing for Personal Computer

IP.com Disclosure Number: IPCOM000062283D
Original Publication Date: 1986-Nov-01
Included in the Prior Art Database: 2005-Mar-09
Document File: 2 page(s) / 39K

Publishing Venue

IBM

Related People

Harrison, RB: AUTHOR [+2]

Abstract

In a personal computer system, several adapters share one interrupt line to an interrupt controller. Each adapter drives the interrupt line high via a tristate device when it has an interrupt request and supplies no drive otherwise. The controller recognizes this high interrupt signal and proceeds to service all interrupting adapters sequentially until the interrupt signal falls. As illustrated in Figs. 1 and 2, this disclosure is concerned with reducing logic and microcode complexity when multiple adapters share a single interrupt line. Fig. 1 shows several adapters or interrupt sources connected to an interrupt line which terminates at one input of an interrupt controller.

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Interrupt Sharing for Personal Computer

In a personal computer system, several adapters share one interrupt line to an interrupt controller. Each adapter drives the interrupt line high via a tristate device when it has an interrupt request and supplies no drive otherwise. The controller recognizes this high interrupt signal and proceeds to service all interrupting adapters sequentially until the interrupt signal falls. As illustrated in Figs. 1 and 2, this disclosure is concerned with reducing logic and microcode complexity when multiple adapters share a single interrupt line. Fig. 1 shows several adapters or interrupt sources connected to an interrupt line which terminates at one input of an interrupt controller. Each adapter drives the interrupt line via a 74LS125 or similar tristate device with its data line held permanently high and its enable input connected to an interrupt input. The result is that each adapter drives the interrupt line high when it has an interrupt input but supplies no drive when it has no interrupt input. Many adapters may thus share the same interrupt line to create an OR function to give a high level when at least one interrupt input occurs. This is shown in Fig. 2. When adapter 1 interrupt goes negative at A, the interrupt line goes positive and stays positive until B when adapter 2 interrupt goes positive. The interrupt controller is programmed to be level rather than edge sensitive. Whilst the interrupt line is high, the controller...