Browse Prior Art Database

High Speed Palette in Color Display System

IP.com Disclosure Number: IPCOM000062316D
Original Publication Date: 1986-Nov-01
Included in the Prior Art Database: 2005-Mar-09
Document File: 2 page(s) / 44K

Publishing Venue

IBM

Related People

Taylor, JL: AUTHOR

Abstract

In a color display, a RAM (random-access memory) palette store is used to assemble data which is read out to form a full rate video stream to drive a CRT screen. When the RAM cycle time is too slow to implement the palette directly, a store bandwidth enhancement method is known in which a palette which is twice the size of an available RAM at double frequency requires four RAMs. The technique disclosed here reduces the RAMs to three by storing the data as A, B and A XOR B, each requiring one RAM. This disclosure implements a palette which is twice the size of an available RAM and must run at twice the speed permitted by the RAM technology. In the prior art the input data is serialized to pel (picture element) pairs and there are two copies of the palette. This uses four RAMs. As shown in Fig.

This text was extracted from a PDF file.
At least one non-text object (such as an image or picture) has been suppressed.
This is the abbreviated version, containing approximately 73% of the total text.

Page 1 of 2

High Speed Palette in Color Display System

In a color display, a RAM (random-access memory) palette store is used to assemble data which is read out to form a full rate video stream to drive a CRT screen. When the RAM cycle time is too slow to implement the palette directly, a store bandwidth enhancement method is known in which a palette which is twice the size of an available RAM at double frequency requires four RAMs. The technique disclosed here reduces the RAMs to three by storing the data as A, B and A XOR B, each requiring one RAM. This disclosure implements a palette which is twice the size of an available RAM and must run at twice the speed permitted by the RAM technology. In the prior art the input data is serialized to pel (picture element) pairs and there are two copies of the palette. This uses four RAMs. As shown in Fig. 1, for double frequency, the input data is a stream of pel pairs supplied at half the video rate. There are two pel inputs p and q which change simultaneously. Fig. 2 shows the output associated with the Fig. 1 input. We require to translate pel pair (p,q) into video data (v,w) according to the appropriate palette data A or B. Video data pairs (v,w) are then serialized into a full rate video stream. Fig. 3 shows a circuit diagram with pel inputs p and q which a control feeds to RAMs 1, 2 and 3. Assuming that each RAM is 64 bytes, then RAM 1 contains A, which is the data for the first 64 bytes of palette, and RAM 2 contains B, which...