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Self-Aligned Collector Contact, With Minimum Spacing to the Base-Emitter Junction, for Ultra-Small Bipolar Transistor

IP.com Disclosure Number: IPCOM000062325D
Original Publication Date: 1986-Nov-01
Included in the Prior Art Database: 2005-Mar-09
Document File: 2 page(s) / 68K

Publishing Venue

IBM

Related People

Iyer, SS: AUTHOR [+2]

Abstract

This article describes an improvement in bipolar transistor technology wherein the need for deep trench isolation is eliminated by placing the collector contact at a minimum distance of base-emitter junction. This allows for very high density circuits, and reduces process complexity enormously. A comprehensive scaling of bipolar technology requires the simultaneous scaling of both the horizontal and vertical dimensions to yield higher performance circuitry. Several methods have been proposed to accomplish the desired narrow basewidth; however, the total device area is severely compromised by the placement of the collector contact outside the active device area. Difference in the diffusions of B and As, is very difficult to control.

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Self-Aligned Collector Contact, With Minimum Spacing to the Base-Emitter Junction, for Ultra-Small Bipolar Transistor

This article describes an improvement in bipolar transistor technology wherein the need for deep trench isolation is eliminated by placing the collector contact at a minimum distance of base-emitter junction. This allows for very high density circuits, and reduces process complexity enormously. A comprehensive scaling of bipolar technology requires the simultaneous scaling of both the horizontal and vertical dimensions to yield higher performance circuitry. Several methods have been proposed to accomplish the desired narrow basewidth; however, the total device area is severely compromised by the placement of the collector contact outside the active device area. Difference in the diffusions of B and As, is very difficult to control. This necessitates the use of a high conductivity and therefore thick subcollector, which in turn requires a deep isolation. The deep trench is the densest solution to this problem, but at the expense of substantial process complexity. In this publication a method is described to circumvent these problems, by placing the collector contact inside the active device area, "butted" against the intrinsic base-emitter junction. The resulting increase in density is accompanied by a reduction in isolation process complexity because of the reduced depth. Standard bipolar technology can be used to provide an isolated device region in n-epi on thin n+ subcollector. Thin layers of SiO2 (10 nm) and Si3N4 (300 nm) are deposited and patterned to define the emitter size (Fig. 1). Next a sidewall is formed using conventional techniques such as by CVD oxide (300 nm) and subsequent directional etching (RIE w...