Browse Prior Art Database

Black Level Restore Circuit for Displays

IP.com Disclosure Number: IPCOM000062337D
Original Publication Date: 1986-Nov-01
Included in the Prior Art Database: 2005-Mar-09
Document File: 2 page(s) / 40K

Publishing Venue

IBM

Related People

Dye, M: AUTHOR [+2]

Abstract

A black level restore circuit is disclosed which, unlike most designs, does not require any external synchronizing input. A CRT cathode is driven by a linear DC-coupled cascode amplifier whose quiescent current with zero video input is controlled by a black level restore feedback circuit. The cascode amplifier is driven by an output from a differential amplifier which also supplies another output to the feedback circuit. The circuit diagram shows a variable-gain analog CRT video amplifier incorporating black level restore. Transistors Q1 to Q4 form a variable-gain differential input voltage amplifier, the output of which is Vp. Transistors Q7 and Q8 form a cascode amplifier producing the large voltage excursion at the collector of Q8 required by the CRT.

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Black Level Restore Circuit for Displays

A black level restore circuit is disclosed which, unlike most designs, does not require any external synchronizing input. A CRT cathode is driven by a linear DC-coupled cascode amplifier whose quiescent current with zero video input is controlled by a black level restore feedback circuit. The cascode amplifier is driven by an output from a differential amplifier which also supplies another output to the feedback circuit. The circuit diagram shows a variable-gain analog CRT video amplifier incorporating black level restore. Transistors Q1 to Q4 form a variable-gain differential input voltage amplifier, the output of which is Vp. Transistors Q7 and Q8 form a cascode amplifier producing the large voltage excursion at the collector of Q8 required by the CRT. Transistors Q5 and Q6 and associated circuitry comprise the black level restore circuit that is required to keep the video off-state voltage at the collector of Q8 constant. The operation of this circuit will be described in two parts: 1. Video Input at Zero The cascode amplifier transistors Q7 and Q8, to operate linearly, must have a current Io flowing for no video input. This quiescent current must be small enough, however, such that sufficient voltage swing at Q8 collector is available without saturating, but not so small that Q8 starts to turn off. This quiescent current is controlled by the circuit of Q5 and Q6 for the condition when no video is visible on the screen, i.e., the screen is at its blackest, hence the name 'black level restore circuit'. Neglecting any offset between Q1 and Q2 for no video at the input, I1 = I2 and hence Ip = O, if Ib = O. If Ib is flowing, then Ip = -Ib and this current (i.e....