Browse Prior Art Database

Dynamic Priority Input/Output Operation Mechanism

IP.com Disclosure Number: IPCOM000062404D
Original Publication Date: 1986-Nov-01
Included in the Prior Art Database: 2005-Mar-09
Document File: 1 page(s) / 13K

Publishing Venue

IBM

Related People

Bourke, DG: AUTHOR [+3]

Abstract

This article describes a technique used in the input/output (I/O) subsystem of a data processing system that allows for dynamic priority assignment to each I/O operation initiated by a program on single or multiple I/O devices. The priority of an I/O operation is assigned at the time of initiation of the operation to an I/O device.

This text was extracted from a PDF file.
This is the abbreviated version, containing approximately 52% of the total text.

Page 1 of 1

Dynamic Priority Input/Output Operation Mechanism

This article describes a technique used in the input/output (I/O) subsystem of a data processing system that allows for dynamic priority assignment to each I/O operation initiated by a program on single or multiple I/O devices. The priority of an I/O operation is assigned at the time of initiation of the operation to an I/O device.

The priority level is a parameter in the Start command, passed to the device at the initiation of an operation. The notion of priority is not associated with the device itself and no longer carries the notion of a persistent device state that must be initialized and controlled by a program. The drawing illustrates a representative set of essential I/O command parameters for starting an I/O operation as seen by a program in the processor. The size of fields chosen for the illustration is arbitrary. The parameters are: . The command byte, divided into a command field and an operation priority field. In this illustration, 5 bits are provided for the command itself, and 3 for priority, giving a total of 8 levels of operation priority. . The I/O address, showing a field for specifying up to four main I/O busses which may be attached to a processor, and 24-bit field for specifying the address of the target device. The target address may be a mapped storage address in the device, or simply a device address. . A storage address, pointing to an I/O control block (IOCB) in the main storage of the processor. The IOCB itself contains more specific definition of the operation to be performed, such as device specific parameters, definitions of main storage areas for data and status reports, and so forth. These parameters are passed to the specified device on the appropriate I/O bus. On receipt of the command on th...