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Method of Class Prioritization Using the Intel 8259 Programmable Interrupt Controller

IP.com Disclosure Number: IPCOM000062431D
Original Publication Date: 1986-Nov-01
Included in the Prior Art Database: 2005-Mar-09
Document File: 2 page(s) / 46K

Publishing Venue

IBM

Related People

Greenberg, MS: AUTHOR [+3]

Abstract

By classifying I/O devices into four classes, the number of levels of preemption in a system using two Intel 8259 controllers is reduced from 16 to 4 and results in a pinned memory savings of 24K bytes. In a system which uses two Intel 8259 programmable interrupt controllers to interface I/O devices to the central processor external interrupts, each 8259 has eight interrupt request lines (IRQs), one per I/O bus level, for a total of sixteen. One approach to system design is to assign bus levels to 8259 IRQs and run in a fixed priority mode. Some I/O adapters which do not require high priority servicing would then run on a high priority 8259 IRQ. Further, a serial port which is high priority when connected to a XMIT/RECEIVE asynchronous device might be low priority if it is connected to a serial printer.

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Method of Class Prioritization Using the Intel 8259 Programmable Interrupt Controller

By classifying I/O devices into four classes, the number of levels of preemption in a system using two Intel 8259 controllers is reduced from 16 to 4 and results in a pinned memory savings of 24K bytes. In a system which uses two Intel 8259 programmable interrupt controllers to interface I/O devices to the central processor external interrupts, each 8259 has eight interrupt request lines (IRQs), one per I/O bus level, for a total of sixteen. One approach to system design is to assign bus levels to 8259 IRQs and run in a fixed priority mode. Some I/O adapters which do not require high priority servicing would then run on a high priority 8259 IRQ. Further, a serial port which is high priority when connected to a XMIT/RECEIVE asynchronous device might be low priority if it is connected to a serial printer. Having 16 levels of preemption would require a Virtual Resource Manager (VRM) to have 32K bytes of pinned memory since the VRM guarantees that an I/O Second Level Interrupt Handler (SLIH) will have a 2K byte stack provided. This problem is solved by classifying I/O devices into four classes as follows: 1. Data loss due to overrun (asynch) 2. Recoverable data loss resulting in performance degradation (diskette) 3. Performance sensitive devices that do not overrun (hardfile) 4. No overrun and not performance sensitive (printer) This approach reduces the levels of preemption from 16...