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III-V Semiconductor Ion Implantation Annealing Capping

IP.com Disclosure Number: IPCOM000062596D
Original Publication Date: 1986-Dec-01
Included in the Prior Art Database: 2005-Mar-09
Document File: 2 page(s) / 43K

Publishing Venue

IBM

Related People

Hovel, HJ: AUTHOR

Abstract

Following ion implantation, an improved capping and annealing cycle raises the crystal to the vicinity of 600ŒC rapidly in an environment of chemical vapor deposition gases. Normal lattice repair occurs during the heating, and cap deposition begins automatically as soon as the temperature is high enough for gas phase chemistry to occur. The temperature can be raised to a point where the deposition is efficient, held there until the cap thickness is sufficient, then raised to the final annealing temperature in neutral atmosphere. Fig. 1 shows a temperature-time schedule. Occasionally, a double layer cap, such as Si3N4-SiO2, might be desired. This is readily accomplished by raising the temperature in steps with deposition at each step with an appropriate change of gas atmosphere, as illustrated in Fig. 2.

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III-V Semiconductor Ion Implantation Annealing Capping

Following ion implantation, an improved capping and annealing cycle raises the crystal to the vicinity of 600OEC rapidly in an environment of chemical vapor deposition gases. Normal lattice repair occurs during the heating, and cap deposition begins automatically as soon as the temperature is high enough for gas phase chemistry to occur. The temperature can be raised to a point where the deposition is efficient, held there until the cap thickness is sufficient, then raised to the final annealing temperature in neutral atmosphere. Fig. 1 shows a temperature-time schedule. Occasionally, a double layer cap, such as Si3N4- SiO2, might be desired. This is readily accomplished by raising the temperature in steps with deposition at each step with an appropriate change of gas atmosphere, as illustrated in Fig. 2. Capping layers appropriate to such a technique include SiO2, Si3N4, TiO2, Ta2O5, GaAlAs, GaP, GaN, AlN, and other III-V mixtures. The lattice starts to rebuild in implanted GaAs, for example, at 250OEC and is largely repaired at 600OEC, while many point defects and small dislocation loops are repaired also at 400-600OEC. Common cap depositions are carried out at 400-500OEC or at 300-400OEC if plasma enhancement is included, so that the cap process, maintaining the sample at this temperature for 5-20 minutes, influences the repair physics of the implanted III-V compound and leads to variable results.

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