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Rotary Switch

IP.com Disclosure Number: IPCOM000062611D
Original Publication Date: 1986-Dec-01
Included in the Prior Art Database: 2005-Mar-09
Document File: 2 page(s) / 51K

Publishing Venue

IBM

Related People

Lien, YC: AUTHOR [+2]

Abstract

This article describes the design of a semi-static switch, called rotary switch, for Tl (2 Mbps) to Tl and ECL (4 Mbps) to ECL space switch. The design can be easily extended to switch even higher speed lines. The innovation is the access protocol for the automatic control of a cross-point switch. 3 p. The general switch configuration is shown in Fig. 1. The switch is based on an N by N cross-point matrix. The N input ports and N output ports are grouped into n sets with P=N/n ports in each set. At input, a set of ports is connected to an input adapter which can multiplex k input lines into P ports. Similarly, at output, a set of ports is connected to an output adapter which can de-multiplex P ports into k output lines.

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Rotary Switch

This article describes the design of a semi-static switch, called rotary switch, for Tl (2 Mbps) to Tl and ECL (4 Mbps) to ECL space switch. The design can be easily extended to switch even higher speed lines. The innovation is the access protocol for the automatic control of a cross-point switch. 3 p. The general switch configuration is shown in Fig. 1. The switch is based on an N by N cross- point matrix. The N input ports and N output ports are grouped into n sets with P=N/n ports in each set. At input, a set of ports is connected to an input adapter which can multiplex k input lines into P ports. Similarly, at output, a set of ports is connected to an output adapter which can de-multiplex P ports into k output lines. The internal switch line bandwidth B is designed to be equally shared by the n adapters in the way that between any input-output adapter pair the connection will be held for a fixed and equal duration of time. Assuming the input line bandwidth bi, the relationship of these configuration parameters is

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Since the connection between each pair of input and output adapters will last a fixed duration of time, traffic arriving at an input adapter may miss the turn and wait for the next connection. Therefore, a slot interchange function at the input adapters for all traffic from the input ports is assumed. It implies that a minimum of storage which can buffer a frame-worth (n slots) of information bits from k inputs is required for each input adapter. As an example, we show a 32 by 32 full-duplex cross-point switch in Fig. 2. The internal switch bandwidth is 32 Mbps. For every two input ports, there is one adapter as the concentrator of 32 Tl lines (or the mixture of Tl and ECL lines providing aggregate bandwidth equivalent 32 Tl lines)....