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Test Structure for Defect Density Measurements in Trench Technology

IP.com Disclosure Number: IPCOM000062612D
Original Publication Date: 1986-Dec-01
Included in the Prior Art Database: 2005-Mar-09
Document File: 2 page(s) / 79K

Publishing Venue

IBM

Related People

Moitie, RA: AUTHOR

Abstract

Disclosed is a test structure which enables detection of defects associated with semiconductor device isolation trenches which lead to device leakage. The test structure is used to make measurements to determine where the isolation is good, where it has failed, and how many failure paths exist. These test results are systematically summarized to establish the defect density in the critical areas of a semiconductor circuit. The test method does not distinguish between different types of isolation failures, but rather gives the number of defects and their locations. The test method is not limited to applications where polysilicon is used with trench technology. (Image Omitted) Four types of isolation defects are shown as an example in Fig. 1.

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Test Structure for Defect Density Measurements in Trench Technology

Disclosed is a test structure which enables detection of defects associated with semiconductor device isolation trenches which lead to device leakage. The test structure is used to make measurements to determine where the isolation is good, where it has failed, and how many failure paths exist. These test results are systematically summarized to establish the defect density in the critical areas of a semiconductor circuit. The test method does not distinguish between different types of isolation failures, but rather gives the number of defects and their locations. The test method is not limited to applications where polysilicon is used with trench technology.

(Image Omitted)

Four types of isolation defects are shown as an example in Fig. 1. The disclosed test structure requires the application of different polarity voltage combinations between sub-collectors and isolations for the purpose of measuring the amount of leakage current present in each potential failure path. The actual leakage currents between the test points in the circuit model are compared to each other and to the desired level, as illustrated in Fig. 2. The desired or acceptable current limits have been derived from theoretical, simulated, and/or empirical data for all potential isolation paths. The complexity of the test procedure and the location of the test points will be dependent on the actual design of the semiconductor circ...