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Lithographic Technique for Imperfect Patterns

IP.com Disclosure Number: IPCOM000062632D
Original Publication Date: 1986-Dec-01
Included in the Prior Art Database: 2005-Mar-09
Document File: 3 page(s) / 54K

Publishing Venue

IBM

Related People

Brodsky, MH: AUTHOR

Abstract

The use of a scanning laser or other beam to sense previously written patterns, associated with previous integrated circuit or packaging levels, assists in precisely aligning a later level. Timing the gating up and down of the writing or sensing beam power to write or not write gives the required dimensions and alignment needed for patterning large areas of elements, such as in thin film transistor liquid crystal displays. The figure shows an exemplary way that the self-learning technique is employed. The gate lines are vertical, and the horizontal source lines are omitted for clarity. Also, not shown, are the transparent electrode pads which are to be connected to the drains.

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Lithographic Technique for Imperfect Patterns

The use of a scanning laser or other beam to sense previously written patterns, associated with previous integrated circuit or packaging levels, assists in precisely aligning a later level. Timing the gating up and down of the writing or sensing beam power to write or not write gives the required dimensions and alignment needed for patterning large areas of elements, such as in thin film transistor liquid crystal displays. The figure shows an exemplary way that the self-learning technique is employed. The gate lines are vertical, and the horizontal source lines are omitted for clarity. Also, not shown, are the transparent electrode pads which are to be connected to the drains. A nine- gate section of an array is shown with the bottom two rows, below the dotted line, of gates nominally in the right locations as defined by a first masking step. The top row of gates, above the dotted line, represents some gates at a distance from the other two rows, and therefore they are shown with an exaggerated systematic misplacement or distortion pattern. There are alignment marks associated with each gate. The alignment marks, defined and deposited at the same time as the gates, are assumed to be close enough to each gate position to reflect the actual gate position. The gates and alignment marks are shown as clear areas with borders. The eventual source-drain positions are shown as diagonally hatched areas with borders. The projected beam area at some point in time is shown as a cross-hatched area with a border. When the beam is scanned at a relatively low power at a velocity v over the area to be patterned, a detector senses by reflection or transmission when the beam is passing over th...