Browse Prior Art Database

Multilayer Field Effect Transistor Channel Resistance Control

IP.com Disclosure Number: IPCOM000062798D
Original Publication Date: 1986-Dec-01
Included in the Prior Art Database: 2005-Mar-09
Document File: 1 page(s) / 11K

Publishing Venue

IBM

Related People

Frank, DJ: AUTHOR [+3]

Abstract

The resistance in a multilayer field effect transistor channel can be lowered through appropriate potential and charge levels in a surface layer.

This text was extracted from a PDF file.
This is the abbreviated version, containing approximately 100% of the total text.

Page 1 of 1

Multilayer Field Effect Transistor Channel Resistance Control

The resistance in a multilayer field effect transistor channel can be lowered through appropriate potential and charge levels in a surface layer.

The improvement is shown in the figure for a GaAs surface layer on an AlGaAs underlayer on a GaAs substrate.

(Image Omitted)

In the absence of the GaAs surface layer, surface states in the gap region of the above device operate to pin the Fermi level at the surface and reduce the number of carriers in the channel in the gap region of the device, thus increasing its resistance. The surface layer reduces this effect. The surface layer thickness and doping are chosen such that, under normal operatin conditions, the surface layer is fully depleted and non-conductive, and the charge of the depleted surface layer substanti counteracts the charge of the surface states. In this way, the number of carriers in the gap region channel is not reduced as far, resulting in lower resistance.

Disclosed anonymously.

1