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Digital to Analog Converter

IP.com Disclosure Number: IPCOM000073375D
Original Publication Date: 1970-Dec-01
Included in the Prior Art Database: 2005-Feb-22
Document File: 2 page(s) / 29K

Publishing Venue

IBM

Related People

Laurich, LA: AUTHOR

Abstract

Shown is a system for controlling a motor which utilizes a digital to analog converter in the control. Initial comparison is between the reference counter 10, which is driven by a clock, and the digital, velocity information from the motor. Reference counter 10 compares the velocity information to the count in the counter, and if an error between the two exists, an error signal proportional to the difference is generated. This error signal from reference counter 10 is monitored by a readout counter 12. The function of the readout counter is to serialize the error signal into pulses with the number of pulses indicative of the error.

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Digital to Analog Converter

Shown is a system for controlling a motor which utilizes a digital to analog converter in the control. Initial comparison is between the reference counter 10, which is driven by a clock, and the digital, velocity information from the motor. Reference counter 10 compares the velocity information to the count in the counter, and if an error between the two exists, an error signal proportional to the difference is generated. This error signal from reference counter 10 is monitored by a readout counter 12. The function of the readout counter is to serialize the error signal into pulses with the number of pulses indicative of the error.

Shifting ring 14 is used to accumulate a history of the error signals from readout counter 12. If an error signal is present, a number of 1's or 0's proportional to the error signal is loaded into the shifting ring. The ring continuously shifts. The output of the shifting ring is fed back into the input of the shifting ring so that the shifting ring will maintain its fixed number of 1's and 0's unless overridden by a 1 or 0 from the readout counter 12. Thus, the shifting ring by the quantity of 1's and 0's it contains will be representative of accumulated error detected by the reference counter 10.

Periodically, the shifting ring is sampled and its contents will appear in the reset register 16. Each stage of register 16 is connected to a resistor and the current from all resistors is summed by analog summer...