Browse Prior Art Database

Disconnect Detector for Switched Networks

IP.com Disclosure Number: IPCOM000073611D
Original Publication Date: 1971-Jan-01
Included in the Prior Art Database: 2005-Feb-22
Document File: 2 page(s) / 54K

Publishing Venue

IBM

Related People

Froemke, JW: AUTHOR

Abstract

The circuitry connects a modem (data set) and a binary synchronous communications adapter (BSCA). The CC line 10 is the data set ready line which indicates that the modem is ready. Since the line 10 is usually noisy, the circuitry distinguishes between a valid condition of line 10 and a noise pulse. If the signal "+ data set ready" on line 10 is ON continuously for a 28.24 millisecond period, the data set ready flip-flop 12 is set. The circuitry distinguishes an abortive disconnect condition from noise on the CC line 10 utilizing timing of a sampling strobe signal on line 14. If the signal on line 10 is OFF continuously for a nominal 28.24 millisecond period, the abortive disconnect flip-flop 16 is set.

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Disconnect Detector for Switched Networks

The circuitry connects a modem (data set) and a binary synchronous communications adapter (BSCA). The CC line 10 is the data set ready line which indicates that the modem is ready. Since the line 10 is usually noisy, the circuitry distinguishes between a valid condition of line 10 and a noise pulse. If the signal "+ data set ready" on line 10 is ON continuously for a 28.24 millisecond period, the data set ready flip-flop 12 is set. The circuitry distinguishes an abortive disconnect condition from noise on the CC line 10 utilizing timing of a sampling strobe signal on line 14. If the signal on line 10 is OFF continuously for a nominal 28.24 millisecond period, the abortive disconnect flip-flop 16 is set. This flip-flop causes a disconnect from the modem with respect to the BSCA to be made by means of its output signal on lead 20 turning off the data terminal ready line 44 through OR circuit 46.

The sampling strobe signal on lead 14 is generated by dividing the frequency from a 124 Hz multivibrator 22. Flip-flops 24 and 26 and AND circuit 28 divide the frequency of multivibrator 22 by four, providing a 32.28 millisecond period with a 4.04 millisecond down time and a 28.24 millisecond up time. When the signal on lead 10 initially turns from OFF to ON, data set ready flip-flop 12 is set utilizing sampling latch 30, and after flip-flop 12 is set, if the signal on lead 10 turns from ON to OFF, the abortive disconnect flip-flop...