Browse Prior Art Database

Card Processing Machine Timing System

IP.com Disclosure Number: IPCOM000073616D
Original Publication Date: 1971-Jan-01
Included in the Prior Art Database: 2005-Feb-22
Document File: 2 page(s) / 57K

Publishing Venue

IBM

Related People

Dimmick, RF: AUTHOR

Abstract

The timing system provides a timing pulse on lead 10 at times corresponding to the passage of each of columns 12 in a document card 14 beneath object point 16, so that columns 12 may be read or punched at point 16 under control of the timing pulse. Emitter gear 18 rotates along with movement of card 14 and has teeth 18a so spaced that they pass an emitter sensor 20 once for each of the columns. In the event that a tooth 18a is not in exact alignment with sensor 20 at the time a column 12 is beneath object point 16, the system provides a timing pulse for each of the columns at a predetermined rotative disalignment of a tooth 18a with respect to sensor 20.

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Card Processing Machine Timing System

The timing system provides a timing pulse on lead 10 at times corresponding to the passage of each of columns 12 in a document card 14 beneath object point 16, so that columns 12 may be read or punched at point 16 under control of the timing pulse. Emitter gear 18 rotates along with movement of card 14 and has teeth 18a so spaced that they pass an emitter sensor 20 once for each of the columns. In the event that a tooth 18a is not in exact alignment with sensor 20 at the time a column 12 is beneath object point 16, the system provides a timing pulse for each of the columns at a predetermined rotative disalignment of a tooth 18a with respect to sensor 20.

Card 14 is propelled forwardly by rolls 22 and 24 which rotate along with emitter gear 18. Oscillator 26 is free-running at a rate such that 256 cycles, for example, occur between pulses from sensor 20 when wheel 18 and rolls 22 and 24 are running at nominal speed; and divide-by-8 network 28 reduces the number of pulses to 32. Transport sensor 30 determines that document card 14 is in the transport and resets latch 32 which gates pulses from the divide-by-8 network 28 through gate 34 to counter 36. Counter 36 counts these pulses until a pulse from sensor 20 occurs. The pulse from sensor 20 is amplified by amplifier 38 and causes gate 40 to transfer the status of counter 36 t' storage register 44. The pulse from sensor 20 also gates a pulse from oscillator 26 through gate 46 to reset counter 36 after this transfer is complete, and counter 36 starts counting again. This sequence of counter, emitter pulse, transfer to register 44, and rese...