Browse Prior Art Database

Data Processing Initialization

IP.com Disclosure Number: IPCOM000073633D
Original Publication Date: 1971-Jan-01
Included in the Prior Art Database: 2005-Feb-22
Document File: 3 page(s) / 82K

Publishing Venue

IBM

Related People

Mills, LE: AUTHOR

Abstract

An initialization process is described which yields a high degree of confidence in system reliability. A hardware boot-strap sequence verifies operation of a data processing unit. The degree of hardware control verification is sufficiently thorough to permit a diagnostic program to begin operation and continue the initializing diagnostic procedures to completion. Procedures are usable either with a microprogrammed processor or a CPU type of processor. Implementation of the initialization procedures facilitates servicing of any malfunctioning units and identification of field replaceable units.

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Data Processing Initialization

An initialization process is described which yields a high degree of confidence in system reliability. A hardware boot-strap sequence verifies operation of a data processing unit. The degree of hardware control verification is sufficiently thorough to permit a diagnostic program to begin operation and continue the initializing diagnostic procedures to completion. Procedures are usable either with a microprogrammed processor or a CPU type of processor. Implementation of the initialization procedures facilitates servicing of any malfunctioning units and identification of field replaceable units.

Figure A is an overall flowchart showing the initializing diagnostic routine. Figure B is a simplified showing of a processor utilizing a Figure A routine upon either having power on or an error restart initiated by an error recovery procedure.

Scan counter 16 steps initial hardware diagnostic sequences. Microprogram control effects diagnostic procedures under scan count control. Once minimum hardware has been diagnosed as operative, microprogram diagnostics complete initialization including memory operation verification. First, a hardware startup routine is initiated. The processor control is under solidly designed hardware. The first step in the routine is to perform selected hardware checks. These checks are sufficiently thorough to provide a high level of confidence that a minimal initializing diagnostic software routine can successfully operate in the processor. In decision step 10, it is determined whether or not a good program base is being provided. If not, the processor is stopped and manual intervention may be required. If a program base has been verified, then sequence AB is performed. AB includes scanning the control memory which, in the illustrated processor, is a read only store (ROS). Upon detection of an error by decision step 11, the processor is stopped in a manner that the error location is displayed. Upon completion of the scan and no errors have been detected, sequence BC is performed. This is a software check of data-flow circuits in the processor. Initially, all data-flow latches are checked for containing binary zeros. If all of the circuits contain a binary zero, then a satisfactory data-flow circuit is indicated. Otherwise, the machine is stopped to indicate where a false "hot 1" is located such that manual intervention and replacement of a faulty unit is facilitated. In sequence CD, the data-flow check is continued by verifying the arithmetic-logic units (ALU) and register operations. This check includes exercising the registers and the arithmetic-logic units for selected or all possible permutations of data combinations.

If the CD check is all right, then the initializing diagnostic routine enters the program-operated startup and checking phase. This may include a complete exercising of the system or subsystem being initialized. Upon detection of an error, the system is stopped for m...