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Silicon Controlled Rectifier Shift Register Memory

IP.com Disclosure Number: IPCOM000073655D
Original Publication Date: 1971-Jan-01
Included in the Prior Art Database: 2005-Feb-22
Document File: 2 page(s) / 50K

Publishing Venue

IBM

Related People

Chin, W: AUTHOR [+2]

Abstract

This shift register of silicon controlled rectifiers (SCR) is capable of receiving parallel information and gating out in parallel, shifting it a selected number of times and then gating it out in parallel or shifting the data out serially. It is also capable of receiving serial information and either gating it out in parallel or shifting it out serially.

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Silicon Controlled Rectifier Shift Register Memory

This shift register of silicon controlled rectifiers (SCR) is capable of receiving parallel information and gating out in parallel, shifting it a selected number of times and then gating it out in parallel or shifting the data out serially. It is also capable of receiving serial information and either gating it out in parallel or shifting it out serially.

The circuit drawing B shows the first two stages of the n bit shift register of the block diagram A. Each stage consists of an input storage section to receive the data and an intermediate section to prevent the loss of information while a shifting operation is occurring.

In this shift register, parallel loading is accomplished by first resetting the register by driving the Reset Line positive as shown in the series of curves C. After resetting, a positive pulse will be applied to all of those stages that are to have a "1" stored in them; all the other stages will store a "0". Parallel readout of the register is effected by gating out the OUT points.

Shifting is performed in this register by first shifting the data from the storage section of each stage into the associated intermediate section of the stage. Then the information is shifted from the intermediate section into the following storage section of the next stage. This is accomplished by first pulsing the Shift 2 line negative to reset the intermediate section. This same line is then pulsed positive to sh...