Browse Prior Art Database

Self Switching Multicable Loop

IP.com Disclosure Number: IPCOM000073740D
Original Publication Date: 1971-Jan-01
Included in the Prior Art Database: 2005-Feb-23
Document File: 3 page(s) / 50K

Publishing Venue

IBM

Related People

Rocher, EY: AUTHOR [+2]

Abstract

A shows a self-switching multicable loop system which consists of a two wire multidrop loop. One wire is used for data and another is used to provide synchronization and sampling frequency. Contrary to normal usage, the input/output devices 1,2,...,n in A above are connected on the data loop at two points: one in the outward direction and one in the inward direction. Thus, all the transmitters T of input/output devices 1,2,...,n are connected upstream of all receivers R of the same input/output devices. The input/output device connection to the loop consists of a 1-byte (or 1 bit) shift register in series with the data loop in such a way as to connect all the shift registers associated with the transmitters T upstream from the receivers R.

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Self Switching Multicable Loop

A shows a self-switching multicable loop system which consists of a two wire multidrop loop. One wire is used for data and another is used to provide synchronization and sampling frequency. Contrary to normal usage, the input/output devices 1,2,...,n in A above are connected on the data loop at two points: one in the outward direction and one in the inward direction. Thus, all the transmitters T of input/output devices 1,2,...,n are connected upstream of all receivers R of the same input/output devices. The input/output device connection to the loop consists of a 1-byte (or 1 bit) shift register in series with the data loop in such a way as to connect all the shift registers associated with the transmitters T upstream from the receivers R. The system is monitored by a control unit which generates clock and frame intervals, decodes incoming information, carries out terminal signaling and makes external connections. As shown in B the basic frame contains two 2-byte addresses (origin and destination with redundancy) and one data byte. The resulting efficiency is 1/5.

While the system may be utilized for both data and voice switching, the latter appears to be the most promising application and the system is described for that mode of operation.

Assuming 2,000 subscribers are attached to the system as described above, and assume that each transmitter T is capable of generating pulse code modulated (PCM) signal. The clock wire provides bit and byte synchronization and the sampling frequency necessary to generate the PCM data stream. Thus, if input/output device 1 wishes to communicate with input/output device Z, the following sequence of operations takes place: When terminal 1 is off-hook, the receiver portion R of terminal 1 captures a dial tone signal which is, for example, sent continuously by the control unit and preceded by an all-station address (as shown in upper portion of B) and a special-dial tone character. Terminal 1 then dials the address of terminal Z and captures the next free frame. Once a frame is captured, the address of terminal Z is inserted in the first two bytes of the frame, the address of terminal 1 is inserted in the next two bytes (as shown in the lower portion of B), and a special ringing character in the fifth byte. As the frame travels around the loop, terminal Z detects its address and accepts the frame. If terminal Z is busy, it sends back a frame address to terminal 1, its own address and a special busy character. When terminal 1 captures that frame, the busy character makes it capture the busy tone s...