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# Prediction Adding Circuit

IP.com Disclosure Number: IPCOM000073782D
Original Publication Date: 1971-Feb-01
Included in the Prior Art Database: 2005-Feb-23
Document File: 3 page(s) / 43K

IBM

## Related People

Queen, LC: AUTHOR

## Abstract

In 2's compliment arithmetic in digital computers, it is often highly desirable to be able to predict when the result of an addition operation is going to result in a zero. This is especially valuable when internal control routines require this information for branching purposes. This objective can be achieved through the relatively simple hardware disclosed.

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Prediction Adding Circuit

In 2's compliment arithmetic in digital computers, it is often highly desirable to be able to predict when the result of an addition operation is going to result in a zero. This is especially valuable when internal control routines require this information for branching purposes. This objective can be achieved through the relatively simple hardware disclosed.

Fig. A represents the basic building block of the prediction circuitry. This block performs the logical function shown upon four input operands. A second circuit is shown in Fig. C which performs the Exclusive OR function upon two inputs. In the case where there are two inputs, A(i) and B(i), the output is equal to the inverse of the Exclusive OR of these two input quantities.

In order to implement the prediction function, the most important aspect is the determination of a logical expression which will represent whether the addition will result in a zero answer. It can be shown that the right hand portion of equation (1) will have a binary value of 1 under the condition that the 2's complement addition of binary number A to binary number B will result in a zero. Add A+B=Phi =

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Thus, circuitry need only be made so as to produce the various terms shown on the right side of the equation 1.

The implementation of equation 1 is shown in Fig. B. There are several AND circuits, 40, 42, 44, 46, 48 and 50, which form the first level of the prediction circuit. It should be noted that the input to the first level AND circuits, are of the form A(i), A(i), A(i+1), A(i+1), and B(i), B(i), B(i+1), B(i+1). The output 52 represents the logical expression The output 52 represents the logical expression

(Image Omitted)

This term can be used to represent any one of the terms in the right...