Browse Prior Art Database

SCR Decoder for Monolithic Memory

IP.com Disclosure Number: IPCOM000073892D
Original Publication Date: 1971-Feb-01
Included in the Prior Art Database: 2005-Feb-23
Document File: 2 page(s) / 33K

Publishing Venue

IBM

Related People

Chin, WB: AUTHOR

Abstract

This silicon-controlled rectifier (SCR) decoder provides high performance with low-power consumption and high chip density. While the circuit is not in operation, the power to drive the SCR's 10 and 12 is maintained off. However, after an input A1 is applied, a 01 power pulse is applied to the anode of SCR 10. If the input A1 is a 1 the SCR 10 will latch. If the input A1 is a 0 the SCR 10 will not latch. Thereafter, a 02 power pulse is applied to the second SCR 12. Again the SCR 12 will latch if a 1 has been applied to its gating terminal through diode D1 or through any of the other diodes D2 to Dn in parallel with diode D1. However, SCR 12 will not latch if no 1's are applied to its gate by any of the diodes D1 to Dn.

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SCR Decoder for Monolithic Memory

This silicon-controlled rectifier (SCR) decoder provides high performance with low-power consumption and high chip density. While the circuit is not in operation, the power to drive the SCR's 10 and 12 is maintained off. However, after an input A1 is applied, a 01 power pulse is applied to the anode of SCR 10. If the input A1 is a 1 the SCR 10 will latch. If the input A1 is a 0 the SCR 10 will not latch. Thereafter, a 02 power pulse is applied to the second SCR 12. Again the SCR 12 will latch if a 1 has been applied to its gating terminal through diode D1 or through any of the other diodes D2 to Dn in parallel with diode D1. However, SCR 12 will not latch if no 1's are applied to its gate by any of the diodes D1 to Dn. The carel power pulse can be reduced once the state of SCR 12 is set to turn off the SCR 10, leaving the decoder output B1 at an up level if the decoder has been selected and at a down level if the decoder has not been selected.

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