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Associative Random Access SCR Memory Cell

IP.com Disclosure Number: IPCOM000073893D
Original Publication Date: 1971-Feb-01
Included in the Prior Art Database: 2005-Feb-23
Document File: 2 page(s) / 39K

Publishing Venue

IBM

Related People

Davidson, EE: AUTHOR

Abstract

This silicon-controlled rectifier (SCR) storage cell performs both associative and normal random-access functions.

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Associative Random Access SCR Memory Cell

This silicon-controlled rectifier (SCR) storage cell performs both associative and normal random-access functions.

To write a "1" into the cell the word write line 10 is pulsed high and the bit line 12 is pulsed low. This allows current to flow through the R1-D4-P2-N3 path causing the right side of the SCR 14 to turn on. When the word write and bit lines are returned to their normal standby levels, after such pulsing, the left side of SCR 14 is left conducting. To write a "0", bit line 12 is not lowered when the word line 10 is pulsed high assuring that neither side of the SCR 14 is on. Hence, when the cell is returned to its quiescent level a 0 will be written into it.

Reading is accomplished by pulsing the word read line 16 high so that the P2-N3 junction, which is reverse biased during standby, will turn on. This allows current to flow down bit line 12 where it can be sensed across the resistor RS.

To search for a 0 the bit line 12 is lowered. If a 1 was stored in the cell when this occurs, transistor T0 would turn on causing a mismatch indication on the word match line 18. If a 0 was stored in the cell, there would be no base current available to transistor T0 and, therefore, no signal would appear on word match line 18 and a match would be indicated. To search for a 1, interrogate 1 line 20 is lowered. If a 0 is stored in the cell, transistor T1 will conduct providing a mismatch signal on the word match line 18 while...