Browse Prior Art Database

MOSFET Low-Power Inverter

IP.com Disclosure Number: IPCOM000073897D
Original Publication Date: 1971-Feb-01
Included in the Prior Art Database: 2005-Feb-23
Document File: 2 page(s) / 38K

Publishing Venue

IBM

Related People

Hsieh, JC: AUTHOR [+2]

Abstract

This circuit provides a true and complement output of the signal applied to the input of the circuit with a minimum of power loss.

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MOSFET Low-Power Inverter

This circuit provides a true and complement output of the signal applied to the input of the circuit with a minimum of power loss.

While the chip select pulse CS is down, the not chip select pulse CS renders device Q1 conductive to charge capacitor C and raises the potential at node A. Thereafter, the application of the chip select pulse CS to devices Q2 and Q4 provides the true input signal at terminal 10 and the complement input signal at terminal 12. After the termination of the chip select pulse CS, the not chip select pulse CS turns devices Q5 and Q6 on to bring the outputs 10 and 12 back to zero potential.

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