Browse Prior Art Database

Monolithic AC Gated Flip Flop

IP.com Disclosure Number: IPCOM000073915D
Original Publication Date: 1971-Feb-01
Included in the Prior Art Database: 2005-Feb-23
Document File: 2 page(s) / 40K

Publishing Venue

IBM

Related People

Rosenbluth, W: AUTHOR

Abstract

This AC gated flip-flop is extremely suitable for adaption into integrated circuit monolithic form.

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Monolithic AC Gated Flip Flop

This AC gated flip-flop is extremely suitable for adaption into integrated circuit monolithic form.

Using positive logic and assuming that no connections exist between terminals 10-12 and 14-16 (shown dashed), and with terminal 10 in a down state, transistor 18 is on or conducting. Similarly, with terminal 14 in an up state, transistor 20 is off or nonconducting. Under these conditions and with a steady DC voltage applied to terminals 12, 16, 21 and 24, the circuit is stable. However, the circuit is activated upon the application of a down pulse to terminal 12 for a time which is approximately 3-5 CR4 time constants. In monolithic form the resistance R4 is actually equal to the combination of R1, R2, R3 or the resistance associated with the collector of transistor 22. The capacitance value of C is equal to the C(base-emitter) of transistor 22 + C(base-collector)of transistor 22 + C(diode D1). This results in a negative waveform transition which will generate a differentiating pulse through the network comprised of CR(equivalent), where R(equivalent) = R4 x R3 x R1 + R2. This pulse will be passed through diode D2 to turn off transistor 18. With transistor 18 off, emitter-follower action occurs at the emitter of transistor 25. In turn, the output signal from the emitter of transistor 25 is coupled via line 26 to transistor 28. Through emitter-follower action transistor 28 is effective to apply a signal to transistor 20, which functions...