Browse Prior Art Database

Low Level Switch

IP.com Disclosure Number: IPCOM000074157D
Original Publication Date: 1971-Mar-01
Included in the Prior Art Database: 2005-Feb-23
Document File: 2 page(s) / 34K

Publishing Venue

IBM

Related People

Sowter, BR: AUTHOR

Abstract

A computer memory, e. g., a magnetic film memory, has a number of sense lines n and a like number of switches n for selectively connecting the sense lines to a common differential amplifier.

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Low Level Switch

A computer memory, e. g., a magnetic film memory, has a number of sense lines n and a like number of switches n for selectively connecting the sense lines to a common differential amplifier.

In A, a differential pair of transistors 10, 12 is used as a switch to apply the output signal from a given sense line from input A1 to differential amplifier 14. Other transistor pairs, not shown, are used to apply output signals from other sense lines and corresponding switches to differential amplifier 14 through additional lines indicated at n1 and n2.

In operation, a sense line is selected by applying a select pulse to the base of transistor 16 to turn on the current source for transistor pairs 10, 12. The signal from the selected sense line is applied to the input A1 at the base of transistor 10 and transmitted to the differential amplifier 14 through transistor pairs 10, 12.

A factor limiting the number of sense lines that may be connected to differential amplifier 14 is the signal and noise on the unselected lines (n-1) coupled to differential amplifier 14 through capacitor Cob of each of the unselected transistors which tends to reduce the signal-to-noise ratio to an unacceptable value. By inserting capacitor C1, having a value substantially equal to capacitor Cob, between the input A1 and the collector of transistor 12, an equal and opposite noise is introduced into differential amplifier 14 which in effect reduces the noise from the unselected line...