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Positive and Negative Voltage Gain Control

IP.com Disclosure Number: IPCOM000074165D
Original Publication Date: 1971-Mar-01
Included in the Prior Art Database: 2005-Feb-23
Document File: 2 page(s) / 30K

Publishing Venue

IBM

Related People

Francois, M: AUTHOR [+2]

Abstract

In automatic time domain equalizers, a key problem is to multiply the signal received by a coefficient positive or negative without distorting the signal. An analog circuit using an operational amplifier A and a FET circuit permits positive and negative gain control. If the dynamic resistance of the FET circuit connected between the ground and the negative input of amplifier A, versus voltage V (v being the control voltage applied to the FET gate) is rho (v), then the circuit gain G is derived from the following equations: V(out) = Ao (V(K)-V(J)) (1). where Ao is the open-loop gain of amplifier A, and V(K) and V(J) are the voltages applied at the positive and the negative inputs of the amplifier, A, respectively. (Image Omitted)

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Positive and Negative Voltage Gain Control

In automatic time domain equalizers, a key problem is to multiply the signal received by a coefficient positive or negative without distorting the signal. An analog circuit using an operational amplifier A and a FET circuit permits positive and negative gain control. If the dynamic resistance of the FET circuit connected between the ground and the negative input of amplifier A, versus voltage V (v being the control voltage applied to the FET gate) is rho (v), then the circuit gain G is derived from the following equations: V(out) = Ao (V(K)-V(J)) (1). where Ao is the open-loop gain of amplifier A, and V(K) and V(J) are the voltages applied at the positive and the negative inputs of the amplifier, A, respectively.

(Image Omitted)

Thus the gain G can be varied under the control of v and it is positive or negative depending on the values of rho with respect to the values of resistors R1 R2 R3 and R4

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