Browse Prior Art Database

Printer Diagnostic System

IP.com Disclosure Number: IPCOM000074234D
Original Publication Date: 1971-Apr-01
Included in the Prior Art Database: 2005-Feb-23
Document File: 2 page(s) / 29K

Publishing Venue

IBM

Related People

Harring, CA: AUTHOR

Abstract

In data processor display console installations using a printer and the display terminal, it is desirable to provide an off-line diagnostic capability during installation or maintenance periods. A system providing this capability includes a dynamic message buffer 1 having a recirculation loop through logical AND circuit 3 and logical OR circuit 7. Data entry is provided through logical AND circuit 5 having data and load data control signal inputs. The output of the message buffer is connected to logical AND circuit 9, where it is combined with a load character command. The output from logical AND circuit 9 is transferred to a character register 11 to address a ROS (Read-Only Storage) character generator 13.

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Printer Diagnostic System

In data processor display console installations using a printer and the display terminal, it is desirable to provide an off-line diagnostic capability during installation or maintenance periods. A system providing this capability includes a dynamic message buffer 1 having a recirculation loop through logical AND circuit 3 and logical OR circuit 7. Data entry is provided through logical AND circuit 5 having data and load data control signal inputs. The output of the message buffer is connected to logical AND circuit 9, where it is combined with a load character command. The output from logical AND circuit 9 is transferred to a character register 11 to address a ROS (Read-Only Storage) character generator
13. The output of character generator 13 is logically combined with a print command signal in logical AND circuit 15 to provide printer data and control signals on output line 17 which is connected to the printer. A character line counter 19 from the associated display console is utilized as one of the inputs to logical AND circuit 21, while an operator control circuit 23 provides load control signals which comprise the second input to logical AND circuit 21. By cycling the counter 19 in a specified sequence, the resulting entries to the message buffer 1 simulate data which is reflected in the output signals to the printer on line 17. Testing sequences include applying the input word to the message buffer with a random parity for one sequ...