Browse Prior Art Database

Minimum Level Control System

IP.com Disclosure Number: IPCOM000074350D
Original Publication Date: 1971-Apr-01
Included in the Prior Art Database: 2005-Feb-23
Document File: 2 page(s) / 40K

Publishing Venue

IBM

Related People

Fritz, RJ: AUTHOR

Abstract

This logic arrangement provides a method of adjusting a signal voltage clipping level by using the result of a prescan of the document to determine the background signal level. The video signal from a scanner is sent to a bank of analog-to-digital converters which are set to provide a digital output in proportion to the amount of contrast in the video signal. These digital outputs are fed to a bank of integrators having different time constants. If the charge on the integrators reaches a set level, a minimum voltage level latch will be set. The outputs from these various latches are combined to set the clipping level.

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Minimum Level Control System

This logic arrangement provides a method of adjusting a signal voltage clipping level by using the result of a prescan of the document to determine the background signal level. The video signal from a scanner is sent to a bank of analog-to-digital converters which are set to provide a digital output in proportion to the amount of contrast in the video signal. These digital outputs are fed to a bank of integrators having different time constants. If the charge on the integrators reaches a set level, a minimum voltage level latch will be set. The outputs from these various latches are combined to set the clipping level.

As shown at A, A-D 1 has digital output from video and 1.0v minimum level. A-D 2 has digital output from video and 3.0v level. The output of A-D 2 is inverted and applied with A-D 1 to AND circuit 1. An output, as shown in B is now applied to integrator. The integrator will charge during prescan time and if it reaches ground it will set latch 1. Integrator 2 has a longer integration time so more output duration from AND 1 will be needed to turn latch 2 on. Any number of integrators and latches can be used. A-D 3 is used to take care of cases where the minimum level may have to be over 3.0v. If background output is over 3.0v then the possibility exists that neither integrator 1 or 2 will charge to ground. A-D 3 is not AND'ed with A-D 2 and inverted so it senses only the output above 2.0v. This value is arbitrary and can b...