Browse Prior Art Database

Associative Hybrid Information Timer

IP.com Disclosure Number: IPCOM000074355D
Original Publication Date: 1971-Apr-01
Included in the Prior Art Database: 2005-Feb-23
Document File: 3 page(s) / 37K

Publishing Venue

IBM

Related People

Dailey, JR: AUTHOR [+2]

Abstract

This associative hybrid information timer provides a system in which associative storage information is compared to I/O register information, with the positively compared information being transferred from storage in synchronism with external data such as that associated with a mechanical device.

This text was extracted from a PDF file.
At least one non-text object (such as an image or picture) has been suppressed.
This is the abbreviated version, containing approximately 53% of the total text.

Page 1 of 3

Associative Hybrid Information Timer

This associative hybrid information timer provides a system in which associative storage information is compared to I/O register information, with the positively compared information being transferred from storage in synchronism with external data such as that associated with a mechanical device.

The associative hybrid information timer consists of an Associative Storage Register (ASR) of monolithic storage cells, and I/O shift register and gate, multiple selector latches, an image store which contains the electronic image, and a mask register that performs a gating function for contents of the I/O register and ASR. The masking register is optional to the system and is used when it is desirable to compare data in the ASR in a preferred pattern (e.g., every 3rd position, 4th position, nth position). The mask essentially passes or blocks data from the I/O register to the ASR.

Coded digital information is assembled and transferred to the I/O register through the gate. When the register is loaded with the desired contents, the gate is closed and all selectors corresponding to a particular I/O unit are enabled. The contents of the l/O register are then masked and selected data is stored in the ASR which permits the I/O register to be cleared. The selector latches are then disabled thereby completing the storage phase of operation.

The second phase of operation is to identify and permutate the coded electronic image data in synchronism with the physical motions and timing sequence of corresponding mechanical data and/or mechanical motion. This is accomplished by circulating the electronic images of the mechanical symbols which reside in the image store through the I/O register and associatively comparing them with the images of the ASR. The image circulation is synchronized with the movement of mechanical data.

Whe...