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Monolithic Low Voltage Regulated Power Supply

IP.com Disclosure Number: IPCOM000074534D
Original Publication Date: 1971-May-01
Included in the Prior Art Database: 2005-Feb-23
Document File: 2 page(s) / 30K

Publishing Venue

IBM

Related People

Ainsworth, RA: AUTHOR

Abstract

A monolithic memory requires a regulated low-voltage power supply which meets the following criteria: 1) The circuit has to act as a current sink for other circuitry on the same semiconductor chip and maintain a constant output voltage whether or not the circuit is in standby or in the process of absorbing load current. 2) The circuit has to maintain a constant output voltage with variations in temperature, component tolerances and power supply. 3) Since the circuit was to be integrated on a chip with many other circuits the standby power must be low.

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Monolithic Low Voltage Regulated Power Supply

A monolithic memory requires a regulated low-voltage power supply which meets the following criteria: 1) The circuit has to act as a current sink for other circuitry on the same semiconductor chip and maintain a constant output voltage whether or not the circuit is in standby or in the process of absorbing load current. 2) The circuit has to maintain a constant output voltage with variations in temperature, component tolerances and power supply. 3) Since the circuit was to be integrated on a chip with many other circuits the standby power must be low.

In the circuit shown, resistors R1, R2 and diode D1 form a voltage reference source. Transistor T1 is a grounded base amplifier with R3 as its load resistor. Transistor T3 is an emitter-follower and transistor T2 is a load inverter. All devices operate in class A mode.

The operation of the circuit is as follows: Assume the load current is equal to zero. With the resistors and transistors shown, the voltage at V1 is approximately 1.0V. Transistors T1 and T2 are conducting approximately 1.6 ma. The voltage at V3 is the same as the voltage on the top of R2, i.e., 0.3V. T3 is on and conducting base current for T2. The voltage V2 = 1.2V.

If lead current flows into node V3 a positive error signal will be developed at V3 reducing the current in T1 and producing an amplified signal at V2. This signal will cause T3 to increase conduction, resulting in more base current for T2. In...