Browse Prior Art Database

Two Way Data Communications on an Open Unidirectional Loop

IP.com Disclosure Number: IPCOM000074556D
Original Publication Date: 1971-May-01
Included in the Prior Art Database: 2005-Feb-23
Document File: 2 page(s) / 31K

Publishing Venue

IBM

Related People

Thomas, WH: AUTHOR [+2]

Abstract

This is a system for interconnecting data processors and terminals in a two-way data communications loop.

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Two Way Data Communications on an Open Unidirectional Loop

This is a system for interconnecting data processors and terminals in a two- way data communications loop.

There is shown a clock and frame generator that produces signals which allow all interface elements in the loop to determine the appropriate time at which a data frame begins and the timing for each data element in the frame. The central processors shown have a complete two-way communications capability with other central processors, or terminals connected on the line. Each central processor is interconnected to other central processors by having a common line through their transmitting terminals and a separate common line connecting all of their receiver sections. The transmitter and receiver sections are shown symbolically by the letters T and R, respectively. The transmitter section provides a transmit interface to the communication line by accepting data from the line to be transmitted to some unit, and upon detection of an empty frame, inserting that data onto the line. The receiver section provides the function of examining each passing frame, and if the frame contains the address of the attached central processor, the receiver accepts the data and transmits it to a subsequent central processor.

The receive transmit interfaces at the terminal units accept all data passing around the loop and retransmits such data, if after examining the data it is determined that it does not belong to the exami...