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A Socket with Multiple Cavities for Microprocessors with Multiple Cores

IP.com Disclosure Number: IPCOM000074583D
Publication Date: 2005-Feb-23
Document File: 2 page(s) / 95K

Publishing Venue

The IP.com Prior Art Database

Abstract

Disclosed is a method that uses multiple cavities in a socket, rather than having only one cavity in the center. Benefits include improved power delivery.

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A Socket with Multiple Cavities for Microprocessors with Multiple Cores

Disclosed is a method that uses multiple cavities in a socket, rather than having only one cavity in the center. Benefits include improved power delivery.

Background

Current sockets have a cavity in the center, and land-side capacitors (LSC) are placed in that cavity. Products with multiple cores usually have a cache in the middle, and the cores are offset with respect to the socket cavity; therefore, the LSCs have a large inductance and are not as effective as if they were exactly under the cores (see Figure 1). Figure 2 shows a conventional socket design.

General Description

The disclosed method enables LSCs to be placed exactly under multiple cores; this provides better power delivery for the cores. When a product has a large number of signals and multiple cores, the socket cavity must be large enough to have LSCs under the cores, yet it cannot exceed a certain size (to provide enough pins for signals). Therefore, the current solution is to use a larger socket and package, which increases product costs. The disclosed method’s additional cavities are used for LSC placement and to reduce the size of cavities so that more pins can be added for signal use. This eliminates the use of larger sockets and packages, and reduces the cost of the product. Figure 3 shows the new cavity design for the socket.

Advantages

The disclosed method eliminates the use of larger sockets and packages, and reduces the cost o...