Browse Prior Art Database

Fast Branch Decision

IP.com Disclosure Number: IPCOM000074607D
Original Publication Date: 1971-May-01
Included in the Prior Art Database: 2005-Feb-23
Document File: 2 page(s) / 13K

Publishing Venue

IBM

Related People

Enger, TA: AUTHOR

Abstract

In certain cases, it is possible to determine whether or not a Branch on Condition instruction of a data processing system having an architecture as disclosed in U. S. Patent 3,400,371 will result in a branch operation, prior to the execution of the instruction that sets the condition code on which the branch depends. The objective is to utilize this fact to improve performance of a large data processing system having a high degree of instruction buffering and execution overlap. By predicting the outcome of an instruction which sets condition codes, prior to execution of the instruction, the instruction fetching mechanism will be able to prefetch the instruction sequence dependent on the condition specified by a subsequent Branch on Condition instruction.

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Fast Branch Decision

In certain cases, it is possible to determine whether or not a Branch on Condition instruction of a data processing system having an architecture as disclosed in U. S. Patent 3,400,371 will result in a branch operation, prior to the execution of the instruction that sets the condition code on which the branch depends. The objective is to utilize this fact to improve performance of a large data processing system having a high degree of instruction buffering and execution overlap. By predicting the outcome of an instruction which sets condition codes, prior to execution of the instruction, the instruction fetching mechanism will be able to prefetch the instruction sequence dependent on the condition specified by a subsequent Branch on Condition instruction.

In general, the condition code setting of an instruction can not be determined until execution of the instruction. It is generally possible, however, to gain some partial information about what condition code setting will result from an instruction. For example, when the instruction decoding unit encounters a Branch on Condition instruction, by examining the operands of the instruction which is to set the condition code, it can make a list of all "possible" condition codes which may result from the operation. If the mask portion of a Branch on Condition instruction does not contain any 1 bits corresponding to "possible" conditions, no branch will result. If the mask portion of a Branch on Condition instruction contains a 1 bit corresponding to every "possible" condition, a branch will result. If neither of these conditions is met, the instruction decoding unit can not decide, prior to the execution of the instruction which is to set the condition code, whether or not a branch will result.

If both operands of an Add ope...