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Browse Prior Art Database

Resource Allocation

IP.com Disclosure Number: IPCOM000074621D
Original Publication Date: 1971-May-01
Included in the Prior Art Database: 2005-Feb-23
Document File: 2 page(s) / 46K

Publishing Venue

IBM

Related People

Bidwell, AW: AUTHOR [+3]

Abstract

In this data processor system, resource allocation hardware is provided to effect organized access to multiaccess resources; e.g. blocks of storage individually accessible to several programs. Auxiliary store M1 contains information identifying unassigned resources available for use. Auxiliary store M2 contains user assignment and related status information for each resource.

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Resource Allocation

In this data processor system, resource allocation hardware is provided to effect organized access to multiaccess resources; e.g. blocks of storage individually accessible to several programs. Auxiliary store M1 contains information identifying unassigned resources available for use. Auxiliary store M2 contains user assignment and related status information for each resource.

M1 is loaded and unloaded on a first-in first-out (FIFO) basis, whereas M2 has a unique address permanently denoted to each resource. Address/count registers (SAR1/CTR and SAR2/CTR) associated with M1 are equipped for unidirectional counting with end-around coupling. Counts in SAR1 and SAR2 are, respectively, incremented during execution of De-allocate and Allocate machine level instructions, while a Full Counter equipped for bidirectional counting is, respectfully, decremented and incremented by these instructions. Full count indication in the Full Counter, which denotes active assignment of all assignable resources, is used to inhibit incrementing of SAR2 and execution of further Allocate instructions.

M1 is loaded during IPL (Initial Program Load) and De-allocate instruction routines. In Allocate instruction routines (assuming the Full Count is less than capacity): 1) resource identity is read from M1 to SAR3 and the processing system; 2) SAR2 and Full Counter are incremented; 3) processing system loads user assignment information and other pertinent flag information i...