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Method for Hardware Accelerated Real-Time Virtual Memory Management with Page Fault Prediction

IP.com Disclosure Number: IPCOM000074641D
Publication Date: 2005-Feb-23
Document File: 7 page(s) / 77K

Publishing Venue

The IP.com Prior Art Database

Abstract

Disclosed is a method for hardware accelerated real-time Virtual Memory Management (VMM) with Page Fault Prediction. Benefits include improved functionality and improved performance.

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Method for Hardware Accelerated Real-Time Virtual Memory Management with Page Fault Prediction

Disclosed is a method for hardware accelerated real-time Virtual Memory Management (VMM) with Page Fault Prediction. Benefits include improved functionality and improved performance.

Background

Virtual memory is part of the memory management subsystem of operating system kernels, including many embedded operating system kernels (as an optional component). For example, software that runs in routers/telecom switches must accommodate a variety of protocol stacks and functionalities that span across several concurrent tasks. Providing a relatively large amount of RAM to keep up with the real-time performance is not an economical solution. Desktop systems solve this problem with VMM but with a big performance trade-off that real-time systems cannot afford. Large real-time embedded systems with memory constraints require a hardware-driven VMM architecture with good performance.

Conventionally, page swapping occurs after a page fault. Accessing the secondary storage to swap pages slows down the associated process and sometimes the complete system, which is clearly perceptible. This issue makes VMM inappropriate for real-time systems. Some VMM implementations use a technique, called prepaging, to prefetch a few pages from the swap file in advance. However, this technique does not improve the performance of the system to a great extent because of the absence of any additional hardware involvement.

The Direct Memory Access (DMA) controller transfers a swapped-out page back to the swap file in secondary storage. During the transfer, the CPU cannot access RAM. In systems with less RAM, DMA operations occur frequently to perform swapping, resulting in a CPU performance drop.

General description

The disclosed method is Hardware-accelerated Real-Time VMM with Page Fault Prediction. The disclosed method includes a standard hardware arrangement that can be used by the VMM subsystem of any operating system kernel. The method performs high-speed virtual memory management suitable for real-time environments more efficiently than conventional approaches.

Advantages

The disclosed method provides advantages, including:

•             Improved performance due to delegating the CPU’s VMM functions to a Virtual Memory Controller (VMC)

•             Improved performance due to providing Page Fault Prediction (PFP)

•             Improved performance due to providing predictive caching

•             Improved performance due to providing fast caching

•             Improved performance due to providing intermediate and fast swapping

•             Improved functionality due to providing Paging Control Table (PCT)

Detailed description

The disclosed method is hardware accelerated real-time virtual memory management with page fault prediction. The method transfers part of the VMM function to a hardware component called a virtual memory controller (VMC). It predicts potential page faults (...