Browse Prior Art Database

Read Detector

IP.com Disclosure Number: IPCOM000074786D
Original Publication Date: 1971-Jun-01
Included in the Prior Art Database: 2005-Feb-23
Document File: 2 page(s) / 34K

Publishing Venue

IBM

Related People

Swartz, JS: AUTHOR

Abstract

A signal readout detector combines a rectifier, clipper and linear amplifier to reduce breakdown voltage requirements. The detector is biased so that the "no signal" operating point would result in transistors 10 and 12 becoming saturated, if it were not for the clamping transistors 14 and 16. The clamps prevent the collector voltage of transistors 10 and 12 from becoming more negative than the emitter voltage of transistors 14 and 16. A variable resistance or potentiometer 22 serves to set the quiescent operating point. Transistors 10 and 12 are grounded-base transistors that are used as a linear signal amplifier in conjunction with transistors 18 and 20. Transistors 24, 26, 28, and 30 are used as rectifiers.

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Read Detector

A signal readout detector combines a rectifier, clipper and linear amplifier to reduce breakdown voltage requirements. The detector is biased so that the "no signal" operating point would result in transistors 10 and 12 becoming saturated, if it were not for the clamping transistors 14 and 16. The clamps prevent the collector voltage of transistors 10 and 12 from becoming more negative than the emitter voltage of transistors 14 and 16. A variable resistance or potentiometer 22 serves to set the quiescent operating point. Transistors 10 and 12 are grounded-base transistors that are used as a linear signal amplifier in conjunction with transistors 18 and 20. Transistors 24, 26, 28, and 30 are used as rectifiers. Capacitor 32 and resistor 34 operate with the amplifier to differentiate the signal being processed, and to overdrive the differentiated signal. Network 36, 38, and 40 is used to derive an automatic gain control voltage.

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