Browse Prior Art Database

Current Balancing System

IP.com Disclosure Number: IPCOM000074807D
Original Publication Date: 1971-Jun-01
Included in the Prior Art Database: 2005-Feb-23
Document File: 2 page(s) / 21K

Publishing Venue

IBM

Related People

Moore, RD: AUTHOR

Abstract

A memory chip is originally designed to draw a specific amount of current from the power supplies. If the memory chip is redesigned, then the power requirements under certain conditions will likely change and, accordingly, the power distribution system would have to be redesigned.

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Current Balancing System

A memory chip is originally designed to draw a specific amount of current from the power supplies. If the memory chip is redesigned, then the power requirements under certain conditions will likely change and, accordingly, the power distribution system would have to be redesigned.

If the power requirements of the redesigned memory chip are less than the original memory chip under a specific set of conditions, then the current balancing circuit shown could be used to draw additional current from the supply during the specific set of conditions, and it could easily be designed on the chip itself.

The current balancing circuit shown will draw several milliamps of current from the voltage supply when V(IN) is in its "up" state and zero current when V(IN) is in its "down" state. This eliminates wasted power dissipation on the selected chip, which is usually operating near its thermal limit.

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