Browse Prior Art Database

3 Device Cell MOSFET Memory System

IP.com Disclosure Number: IPCOM000074886D
Original Publication Date: 1971-Jun-01
Included in the Prior Art Database: 2005-Feb-24
Document File: 2 page(s) / 31K

Publishing Venue

IBM

Related People

Repchick, DP: AUTHOR

Abstract

This 3-device storage cell 8 will store information dynamically. To read data stored in the cell 8, the bit-sense line 10 is charged from the bit control circuit 12. Thereafter, the W2 word line 14 is energized turning on device Q2. If a "1" is stored in the cell device Q1 will be conducting, discharging the charge on the bit-sense line 10. If a "0" is stored in the cell, device Q1 will not be conducting so that the bit-sense line 10 will not be discharged. The presence or absence of a discharge pulse is sensed by the sense amplifier 16.

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3 Device Cell MOSFET Memory System

This 3-device storage cell 8 will store information dynamically. To read data stored in the cell 8, the bit-sense line 10 is charged from the bit control circuit 12. Thereafter, the W2 word line 14 is energized turning on device Q2. If a "1" is stored in the cell device Q1 will be conducting, discharging the charge on the bit- sense line 10. If a "0" is stored in the cell, device Q1 will not be conducting so that the bit-sense line 10 will not be discharged. The presence or absence of a discharge pulse is sensed by the sense amplifier 16.

To write data into the cell, a pulse is transmitted down the W1 word line 18 biasing the device Q3 conductive. Whether a 0 or 1 is written into the cell at this time will depend on the potential on the restore line 20, at the time of this write pulse. If a high potential is placed on the restore line 20 the gate-to-source capacitor is charged, storing a 1 in the cell. If a 0 is to be stored in the cell, no charge or a negative charge is placed on the restore line 20 so that gate-to- source capacitance of device Q1 will not be charged up to the threshold level.

Since the cell stores data dynamically, the data that is in the cell must be stored periodically. This is accomplished by performing a combination of read and write cycles. The data in the cell is first read out of the cell in the manner described and stored in the bit control circuit 12. Thereafter, the stored data is inverted and placed...