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Three Phase Power Control Circuit

IP.com Disclosure Number: IPCOM000075175D
Original Publication Date: 1971-Aug-01
Included in the Prior Art Database: 2005-Feb-24
Document File: 2 page(s) / 39K

Publishing Venue

IBM

Related People

Bacon, JL: AUTHOR

Abstract

In order to insure accurate regulations of the DC output of a three-phase full-wave bridge rectifier, the full-wave bridge rectifier is modified by inserting silicon controlled rectifiers (SCR) 10 in place of some of the diodes normally found in such a circuit. In addition, a trigger circuit 12 is connected to each line input and controls each individual SCR 10. Through the trigger circuit 12, each SCR 10 is fired by the line voltage to which it is connected through the appropriate resistor 14, 16, or 18 associated with each input line. Also to aid in the firing of the SCR's 10, diodes 20, 22, and 24 are connected to the respective resistors in input lines 1, 2 and 3 and serve to inhibit the firing of the SCR's 10, when semiconductor Q1 is turned on (conducting).

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Three Phase Power Control Circuit

In order to insure accurate regulations of the DC output of a three-phase full- wave bridge rectifier, the full-wave bridge rectifier is modified by inserting silicon controlled rectifiers (SCR) 10 in place of some of the diodes normally found in such a circuit. In addition, a trigger circuit 12 is connected to each line input and controls each individual SCR 10. Through the trigger circuit 12, each SCR 10 is fired by the line voltage to which it is connected through the appropriate resistor 14, 16, or 18 associated with each input line. Also to aid in the firing of the SCR's 10, diodes 20, 22, and 24 are connected to the respective resistors in input lines 1, 2 and 3 and serve to inhibit the firing of the SCR's 10, when semiconductor Q1 is turned on (conducting). The control of Q1 is accomplished through amplifier 26 and level-detector circuit 28. When the input voltage to the amplifier 26 reaches a predetermined value established by the Vr, the amplifier 26 then enters its active region and its output begins to decrease. At this point the level-detector circuit 28 will then turn Q1 on, inhibiting the firing pulses to SCRs 10. When the voltage at the amplifier input is less than Vr, Q1 remains in an off condition allowing firing of the SCR's. As all three SCR's 10 are triggered by a single condition of Q1, only the SCR 10 which is biased properly for conduction will conduct and therefore duplication of the control and triggering...