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Crossover Detector

IP.com Disclosure Number: IPCOM000075279D
Original Publication Date: 1971-Aug-01
Included in the Prior Art Database: 2005-Feb-24
Document File: 2 page(s) / 29K

Publishing Venue

IBM

Related People

Hoskins, PK: AUTHOR

Abstract

This simplified crossover-detector circuit uniquely has the outputs of the threshold detectors 12 and 13 cross coupled to the clock inputs C of flip-flops 17 and 16, respectively, and also applied through delay circuits 14 and 15 to the data inputs D of flip-flops 16 and 17, respectively. The outputs of flip-flops 16 and 17 are ORed in circuit 18, such that a positive output of 18 represents a zero crossing in either direction of the differentiated analog input signal.

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Crossover Detector

This simplified crossover-detector circuit uniquely has the outputs of the threshold detectors 12 and 13 cross coupled to the clock inputs C of flip-flops 17 and 16, respectively, and also applied through delay circuits 14 and 15 to the data inputs D of flip-flops 16 and 17, respectively. The outputs of flip-flops 16 and 17 are ORed in circuit 18, such that a positive output of 18 represents a zero crossing in either direction of the differentiated analog input signal.

The zero crossing of a positive to a negative differentiated transition is sensed by the following operation. The positive threshold detector 12 is activated, since the positive threshold has been surpassed. When the input voltage drops below the threshold of the detector 12, the detector 12 deactivates but the delay 14 will maintain a positive level at the D input of flip-flop 16 long enough for the input to drop low enough to activate the negative threshold detector 13, which clocks the positive level at D into flip-flop 16.

Once flip-flop 16 has flipped, OR 18 provides a positive output thus indicating a crossover, and is combined at AND gate 19 with the flip-flop 16 output to reset the flip-flop 16 at R. A negative to positive crossover operates in a like manner thru delay 15, flip-flop 17 and AND 20.

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